init_chip.c

#include "sx1262/sx1262.h"
#include "sx1262/sx126x.h"
#include "sx1262/sx126x_hal.h"
#include "mculibrary.h"
#include "irq_router.h"
#include "networkif.h"
 
static volatile int is_in_rx_mode = 0;
byte sx1262_initialized = 0;
extern int sx1262_transmit_fail_counter;
void sx1262_set_lora_packet_type(void *ctx) {
  uint8_t xbuf[16];
 
  xbuf[0] = 0x8A;                                               // set packet type
  xbuf[1] = 1;
  sx126x_hal_write(ctx, (const uint8_t *)&xbuf, 2, NULL, 0);    // set packet type
}
 
void sx1262_set_packet_params(void *ctx, int payload_size) {
  uint8_t xbuf[16];
 
  //setpacketparams
  xbuf[0] = 0x8C;                                               // setpacketparams
  xbuf[1] = 0;
  xbuf[2] = 12;                                                 // preamble length
  xbuf[3] = 00;                                                 // 0==variable length (explicit header) | 1==fixed length (implicit header)
  xbuf[4] = payload_size;                                       // payload size
  xbuf[5] = 1;                                                  // crc on
  xbuf[6] = 0;                                                  // invert IQ (?)
  sx126x_hal_write(ctx, (const uint8_t *)&xbuf, 7, NULL, 0);    // set packet parameters
}
void sx1262_set_lora_parameters(void *ctx) {
  struct sx126x_mod_params_lora_s lp = { .sf = SX126X_LORA_SF8, .bw = SX126X_LORA_BW_250, .cr = SX126X_LORA_CR_4_7, .ldro = 1 };
 
  sx126x_set_lora_mod_params(ctx, &lp);
}
static char *int2str(int status, int comp, char *name) {
  if (status != comp) {
    return NULL;
  }
  return name;
}
char *chip_status_name(sx126x_chip_modes_t status) {
  char *res;
 
  if ((res = int2str(status, SX126X_CHIP_MODE_UNUSED, "UNUSED")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CHIP_MODE_RFU, "RFU")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CHIP_MODE_STBY_RC, "STBY_RC")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CHIP_MODE_STBY_XOSC, "STBY_XOSC")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CHIP_MODE_FS, "FS")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CHIP_MODE_RX, "RX")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CHIP_MODE_TX, "TX")) != NULL) {
    return res;
  }
 
 
  return "foo";
}
char *chip_com_name(sx126x_cmd_status_t status) {
  char *res;
 
  if ((res = int2str(status, SX126X_CMD_STATUS_RESERVED, "RESERVED")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CMD_STATUS_RFU, "RFU")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CMD_STATUS_DATA_AVAILABLE, "DATA_AVAILABLE")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CMD_STATUS_CMD_TIMEOUT, "CMD_TIMEOUT")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CMD_STATUS_CMD_PROCESS_ERROR, "CMD_PROCESS_ERROR")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CMD_STATUS_CMD_EXEC_FAILURE, "CMD_EXEC_FAILURE")) != NULL) {
    return res;
  }
  if ((res = int2str(status, SX126X_CMD_STATUS_CMD_TX_DONE, "CMD_TX_DONE")) != NULL) {
    return res;
  }
  return "foo";
}
 
// return cmd_status
int print_chip_status(void *ctx, int include_mode) {
  struct sx126x_chip_status_s rs;
 
  sx126x_get_status(ctx, &rs);
#ifdef SX126X_DEBUG
  if (include_mode) {
    printf("[sx1262] Chip Status:\r\n");
    printf("[sx1262]     Cmd    :0x%x (%s)\r\n", rs.cmd_status, chip_com_name(rs.cmd_status));
    printf("[sx1262]     Mode   :0x%x (%s)\r\n", rs.chip_mode, chip_status_name(rs.chip_mode));
  } else {
    printf("[sx1262]  Chip Cmd Status:0x%x (%s)\r\n", rs.cmd_status, chip_com_name(rs.cmd_status));
  }
#endif
  return rs.cmd_status;
}
void print_errors(void *ctx) {
  uint16_t errors;
 
  sx126x_get_device_errors(ctx, &errors);
  printf("[sx1262] Errors: %p\r\n", errors);
}
int check_register(void *ctx, uint16_t reg, int comp) {
  uint8_t buf[128];
 
  sx126x_clear_device_errors(ctx);
  sx126x_read_register(ctx, reg, buf, 1);
  if (buf[0] != comp) {
    printf("[sx1262] Register 0x%p should be 0x%x, but is 0x%x\r\n", reg, comp, buf[0]);
    return 1;
  }
  if (print_chip_status(ctx, 1) != 0) {
    // could not exec_command?? this seems to happen all the time
    // return 2;
  }
  return 0;
}
int probe_chip(void *ctx) {
  printf("[sx1262] probing chip...\r\n");
  uint8_t buf[128];
 
  sx1262_clear_rx_mode();
  sx126x_clear_device_errors(ctx);
  if (check_register(ctx, 0x6BF, 0x21)) {
    return 1;
  }
  if (check_register(ctx, 0x6BC, 0x1D)) {
    return 3;
  }
 
  buf[0] = 0x6C;
  sx126x_write_register(ctx, 0x6BF, &buf[0], 1);
  if (check_register(ctx, 0x6BF, 0x6C)) {
    return 5;
  }
 
  buf[0] = 0x21;
  sx126x_write_register(ctx, 0x6BF, &buf[0], 1);
 
  printf("[sx1262] Chip probed successfully\r\n\r\n");
  return 0;
}
 
int config_pins(struct network_context *nctx, byte reinit) {
  int r;
  int mask = 0xFFFF;
 
  sx1262_clear_rx_mode();
 
  if (reinit) {
    mask = 0;
  }
  /********************* configure pins and spi etc ***************************/
  r = mculib_pin_in(nctx->mculib_handle, SX1262_BUSY, HAL_PIN_FASTEST, HAL_PUSHPULL_NONE); // BUSY
  MCULIB_ERR_RET("BUSYPIN", (r & mask));
 
  r = mculib_pin_in(nctx->mculib_handle, SX1262_DIO1, HAL_PIN_FASTEST, HAL_PUSHPULL_NONE); // DIO1
  MCULIB_ERR_RET("DIOPIN", (r & mask));
  r = register_softirq(nctx->mculib_handle, SX1262_DIO1, &sx1262_irq, nctx);
  if ((reinit == 0) && (r != 0)) {
    printf("[sx1262] failed to register irq (%i)\r\n", r);
    return r;
  }
 
  r = mculib_pin_out(nctx->mculib_handle, SX1262_CSN, HAL_PIN_FASTEST); // CSN
  MCULIB_ERR_RET("CSNPIN", (r & mask));
 
  r = mculib_pin_out(nctx->mculib_handle, SX1262_RESET, HAL_PIN_FASTEST);
  MCULIB_ERR_RET("RESETPIN", (r & mask));
 
  r = mculib_spi_master_enable2(nctx->mculib_handle, 2, 0, 0, 0, SPI_DIR_RW); // port #2, wide=0, CPOL=0,CPHA=0
  MCULIB_ERR_RET("SPIEN", (r & mask));
 
  r = mculib_pin_set(nctx->mculib_handle, SX1262_RESET, 0);
  MCULIB_ERR_RET("RESET0", (r & mask));
  Delay(100);
  r = mculib_pin_set(nctx->mculib_handle, SX1262_RESET, 1);
  MCULIB_ERR_RET("RESET1", (r & mask));
  print_chip_status(NULL, 1);
  r = mculib_pin_set(nctx->mculib_handle, SX1262_CSN, 1);
  MCULIB_ERR_RET("CSN1", (r & mask));
  sx1262_transmit_fail_counter = 0;
  sx1262_done_transmit();
  return 0;
}
int sx1262_probe(struct network_context *nctx) {
  int r = config_pins(nctx, 0);
 
  sx1262_clear_rx_mode();
 
  if (r != 0) {
    return r;
  }
  r = probe_chip(nctx);
  if (r != 0) {
    printf("[sx1262] Probe FAILURE (%i)!!!!\r\n", r);
    return 1;
  }
 
  return 0;
}
 
// if reinit != 0, ignore pin assignment errors (assume they have been allocated previously)
int sx1262_init_or_reinit(struct network_context *nctx, byte reinit) {
  printf("[sx1262] Init sx1262...\r\n");
  int r;
 
  sx1262_clear_rx_mode();
 
  r = config_pins(nctx, reinit);
  if (r != 0) {
    return r;
  }
  /********************* test chip ***************************/
  r = probe_chip(nctx);
  if (r != 0) {
    printf("[sx1262] Probe FAILURE (%i)!!!!\r\n", r);
    return 1;
  }
  /********************* configure the chip ***************************/
  printf("[sx1262] Configuring chip...\r\n");
 
  sx126x_set_dio3_as_tcxo_ctrl(nctx, SX126X_TCXO_CTRL_3_3V, 1000);
  print_chip_status(nctx, 0);
  sx126x_clear_device_errors(nctx);
  r = sx126x_set_reg_mode(nctx, SX126X_REG_MODE_DCDC);
  printf("[sx1262] Reg mode: %i\r\n", r);
  print_chip_status(nctx, 0);
  sx1262_switch_to_rx();
 
  uint16_t irq_mask;
 
  irq_mask = 0;
  irq_mask |= (1 << 0);
  irq_mask |= (1 << 1);
  irq_mask |= (1 << 7); // carrier detect
  irq_mask |= (1 << 8); // carrier lost
  irq_mask |= (1 << 9);
  sx126x_set_dio_irq_params(nctx, irq_mask, 0xFFFF, 0, 0);
  print_chip_status(nctx, 1);
  // this seems to break rx?
  // sx1262_done_transmit();
  sx1262_initialized = 1;
  printf("[sx1262] Chip configured\r\n");
  nic_set_transmit_status(nctx, 1);
  return 0;
}
int sx1262_init(struct network_context *nctx) {
  sx1262_clear_rx_mode();
  return sx1262_init_or_reinit(nctx, 0);
}
// warning! nctx might be NUL!!
void sx1262_switch_to_rx(struct network_context *nctx) {
  struct sx126x_chip_status_s rs;
 
  sx126x_get_status(nctx, &rs);
  if (rs.chip_mode == SX126X_CHIP_MODE_RX) {
    return;
  }
  printf("[sx1262] switching to rx mode\r\n");
  sx1262_set_lora_packet_type(nctx);
  sx1262_set_lora_parameters(nctx);
  sx126x_set_rf_freq(nctx, 868000000);
  sx126x_set_buffer_base_address(nctx, 0, 0);
  sx1262_set_packet_params(nctx, 0);
  struct sx126x_pa_cfg_params_s pa_params = { .pa_duty_cycle = 0x04, .hp_max = 0x07, .device_sel = 0, .pa_lut = 1 };
 
  sx126x_set_pa_cfg(nctx, &pa_params);
  sx126x_set_dio2_as_rf_sw_ctrl(nctx, 1);
  //print_chip_status(nctx, 0);
 
 
  for (;;) {
    //printf("Setting RX Mode\r\n");
    sx126x_set_rx_with_timeout_in_rtc_step(nctx, SX126X_RX_SINGLE_MODE);
    struct sx126x_chip_status_s rs;
    sx126x_get_status(nctx, &rs);
    //    printf("Chip mode: 0x%x (%s), Cmd Status: 0x%x (%s)\r\n", rs.chip_mode, chip_status_name(rs.chip_mode), rs.cmd_status, chip_com_name(rs.cmd_status));
    //print_errors(nctx);
    sx126x_clear_device_errors(nctx);
    if (rs.chip_mode == SX126X_CHIP_MODE_RX) {
      break;
    }
    Delay(100);
  }
  is_in_rx_mode = 1;
}
void sx1262_clear_rx_mode() {
  is_in_rx_mode = 0;
}
int sx1262_stop(struct network_context *ctx) {
  uint8_t xbuf[16];
 
  sx1262_clear_rx_mode();
 
  xbuf[0] = 0x84;                                               // set sleep mode
  xbuf[1] = 1;
  sx126x_hal_write(ctx, (const uint8_t *)&xbuf, 1, NULL, 0);    // set packet type
  mculib_pin_set(ctx->mculib_handle, SX1262_CSN, 1);            // if this goes low, we actually wake up the chip again
 
  mculib_pin_release(ctx->mculib_handle, SX1262_BUSY);
  mculib_pin_release(ctx->mculib_handle, SX1262_DIO1);
  mculib_pin_release(ctx->mculib_handle, SX1262_RESET);
  mculib_spi_disable(ctx->mculib_handle, 2);
  nic_set_transmit_status(ctx, 0);
  return 0;
}