sx126x_regs.h

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#ifndef SX126X_REGS_H
#define SX126X_REGS_H
 
/*
 * -----------------------------------------------------------------------------
 * --- DEPENDENCIES ------------------------------------------------------------
 */
 
/*
 * -----------------------------------------------------------------------------
 * --- PUBLIC MACROS -----------------------------------------------------------
 */
 
/*
 * -----------------------------------------------------------------------------
 * --- PUBLIC CONSTANTS --------------------------------------------------------
 */
 
#define SX126X_REG_CRCSEEDBASEADDRESS 0x06BC
 
#define SX126X_REG_CRCPOLYBASEADDRESS 0x06BE
 
#define SX126X_REG_WHITSEEDBASEADDRESS 0x06B8
 
#define SX126X_REG_PKTPARAMS 0x0704
 
#define SX126X_REG_SYNCWORDBASEADDRESS 0x06C0
 
#define SX126X_REG_LR_SYNCWORD 0x0740
 
#define SX126X_REG_RNGBASEADDRESS 0x0819
 
#define SX126X_REG_ANA_LNA 0x08E2
 
#define SX126X_REG_ANA_MIXER 0x08E5
 
#define SX126X_REG_RXGAIN 0x08AC
 
#define SX126X_REG_XTATRIM 0x0911
 
#define SX126X_REG_OCP 0x08E7
 
#define SX126X_REG_IRQ_POLARITY 0x0736
 
#define SX126X_REG_TX_MODULATION 0x0889
 
#define SX126X_REG_TX_CLAMP_CFG 0x08D8
#define SX126X_REG_TX_CLAMP_CFG_POS (1U)
#define SX126X_REG_TX_CLAMP_CFG_MASK (0x0FUL << SX126X_REG_TX_CLAMP_CFG_POS)
 
#define SX126X_REG_RTC_CTRL 0x0902
 
#define SX126X_REG_EVT_CLR 0x0944
#define SX126X_REG_EVT_CLR_TIMEOUT_POS (1U)
#define SX126X_REG_EVT_CLR_TIMEOUT_MASK (0x01UL << SX126X_REG_EVT_CLR_TIMEOUT_POS)
 
#define SX126X_REG_RX_ADDRESS_POINTER 0x0803
 
#define SX126X_REG_RXTX_PAYLOAD_LEN 0x06BB
 
#define SX126X_REG_OUT_DIS_REG 0x0580
#define SX126X_REG_OUT_DIS_REG_DIO3_POS (3U)
#define SX126X_REG_OUT_DIS_REG_DIO3_MASK (0x01UL << SX126X_REG_OUT_DIS_REG_DIO3_POS)
 
#define SX126X_REG_IN_EN_REG 0x0583
#define SX126X_REG_IN_EN_REG_DIO3_POS (3U)
#define SX126X_REG_IN_EN_REG_DIO3_MASK (0x01UL << SX126X_REG_IN_EN_REG_DIO3_POS)
 
#define SX126X_REG_BITBANG_A_REG 0x0680
#define SX126X_REG_BITBANG_A_REG_ENABLE_POS (4U)
#define SX126X_REG_BITBANG_A_REG_ENABLE_MASK (0x07UL << SX126X_REG_BITBANG_A_REG_ENABLE_POS)
#define SX126X_REG_BITBANG_A_REG_ENABLE_VAL (0x01UL << SX126X_REG_BITBANG_A_REG_ENABLE_POS)
 
#define SX126X_REG_BITBANG_B_REG 0x0587
#define SX126X_REG_BITBANG_B_REG_ENABLE_POS (0U)
#define SX126X_REG_BITBANG_B_REG_ENABLE_MASK (0x0FUL << SX126X_REG_BITBANG_B_REG_ENABLE_POS)
#define SX126X_REG_BITBANG_B_REG_ENABLE_VAL (0x0CUL << SX126X_REG_BITBANG_B_REG_ENABLE_POS)
 
#define SX126X_REG_LR_SYNCH_TIMEOUT 0x0706
 
/*
 * -----------------------------------------------------------------------------
 * --- PUBLIC TYPES ------------------------------------------------------------
 */
 
/*
 * -----------------------------------------------------------------------------
 * --- PUBLIC FUNCTIONS PROTOTYPES ---------------------------------------------
 */
 
#endif  // SX126X_REGS_H
 
/* --- EOF ------------------------------------------------------------------ */